www.iterrac.com IT4016 clock phase delay with buffered output this is a production data sheet. see product statu s definitions on web site or catalog for product development status. april 24, 2007 doc. 4044 rev. 1.1 1 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 description features performance and electrical characteristics (9 to 12.5 ghz) the IT4016 is a clock phase delay with buffered out put that provides a voltage-variable phase shift that allows the user to align data and clock signals with high precision. the rf output is constant over all phase shift setting s b ecause of the limiting action of the output buffer amplifier. the insertion phase and output le vel are also stabilized over temperature and input level changes through the use of gaas var actor diodes and thin-film ceramic circuits. typical uses include clock delay shifters for optical timing circuits, power combining networks, and test and measurement applic ations. wideband signal handling: 9 ghz to 12.5 ghz 360 deg. minimum phase shift range output amplitude: 1.7 vpp typical limited output ac coupled input and output input: 0.2 vpp to 1.4 vpp temperature-stable amplitude and phase response db -10 input/output reflection dbc -20 output harmonics (at maximum input level) v 1.4 0.2 operating input level (vpp) v 15 5.0 4.5 dc voltage operating supply (at 130 ma max.) v 0 -15 control voltage input ( 360-deg. phase change) ps +/-3 insertion delay variation with input level (any 3-db change in input level, 0.2 to 1.4 vpp) ps/ c +.05 insertion delay variation with case temperature ( 0 c - 85 c) deg. 380 360 phase adjustment range v 1.9 1.5 output level (vpp) units max typ. min. parameter
www.iterrac.com IT4016 clock phase delay with buffered output this is a production data sheet. see product statu s definitions on web site or catalog for product development status. april 24, 2007 doc. 4044 rev. 1.1 2 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 typical time domain performance output with control voltage varied from 0 to -15 v (vertical scale: 0.4 v/div) output with temperature varied from 25 c to 70 c (vertical scale: 0.4 v/div) output with input amplitude varied from 0.5 vpp to 1.0 vpp (vertical scale: 0.4 v/div)
www.iterrac.com IT4016 clock phase delay with buffered output this is a production data sheet. see product statu s definitions on web site or catalog for product development status. april 24, 2007 doc. 4044 rev. 1.1 3 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 typical insertion phase at 9,10.7, and 12.5 ghz. control voltage (x axis) varied from 0 to C15 v IT4016 0.00 45.00 90.00 135.00 180.00 225.00 270.00 315.00 360.00 405.00 0 - 2 - 4 - 6 - 8 - 10 - 12 - 14 - 16 volts phase 9 ghz 10.7 ghz 12.5 ghz mechanical dimensions (in inches)
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